
S T 3 4 3 2 1 A   M E D A L . U L T R A    SEAGATE
                                                      Native|  Translation
                                                      ------+-----+-----+-----
Form                 3.5"/SLIMLINE         Cylinders        | 8894| 1024|
Capacity form/unform  4303/      MB        Heads           4|   15|   16|
Seek time   / track  11.3/ 1.7 ms          Sector/track     |   63|   63|
Controller           IDE / ATA3 ULTRA      Precompensation
Cache/Buffer           128 KB              Landing Zone
Data transfer rate   13.000 MB/S int       Bytes/Sector      512
                     33.300 MB/S ext UDMA2
Recording method     PRML 16/17,ZBR                 operating  | non-operating
                                                  -------------+--------------
Supply voltage     5/12 V       Temperature *C         5 50    |    -40 60
Power: sleep              W     Humidity     %                 |
       standby        0.9 W     Altitude    km                 |
       idle           4.9 W     Shock        g        10       |     75
       seek           9.1 W     Rotation   RPM      5400
       read/write         W     Acoustic   dBA
       spin-up            W     ECC        Bit   SMART
                                MTBF         h     300000
                                Warranty Month        36
Lift/Lock/Park     YES          Certificates                                  

**********************************************************************
                        L   A   Y   O   U   T
**********************************************************************
SEAGATE  ST38641A  INSTALLATION GUIDE


                         J2  40 pin I/O Cable Connection
                         |   pin-20 removed
                         |
              +--------- |---------+-------1-/---------\    TOP (HDA)
             -+::::::::::*::::::::1| : : : : | 0 0 0 0 |--
              +--------------------+8|-|-|-|-+-5-G-G-12+    BOTTOM
                                     | | | |
              Master ON, Slave OFF --+ | | |
    Slave Present (when Master ON) ----+ | |
     Cable Select (when Slave OFF) ----+ | |
                          Reserved ------+ |
                    Limit capacity --------+

  Limit Capacity jumper sets the default cylinder translation
  to 4092 to solve issues with certain BIOS that only auto-detect.
  Total available sectors are still at full capacity as reported via
  Identify Drive data words 52 - 61.  Third party partitioning
  software may be needed to achieve full capacity if this option
  jumper is used.



**********************************************************************
                      J   U   M   P   E   R   S
**********************************************************************
SEAGATE  ST38641A  INSTALLATION GUIDE


 Jumper settings
 ===============

 Master/slave configuration
 --------------------------
 You must establish a master/slave relationship between two drives
 that are attached to a single AT bus. You can configure a drive to be
 a master or slave by setting the master/slave jumpers.

 These drives support master/slave configuration using the cable
 select option. This requires a special daisy-chain cable that grounds
 pin 28 (CSEL) on one of its two drive connectors. If you attach the
 drive to the grounded CSEL connector, it becomes a master. If you
 attach the drive to the ungrounded CSEL connector, it becomes a
 slave. To use this option, the host system and both drives must
 support cable select, and both drives must be configured for cable
 select. To configure this drive for cable select, install a jumper.

 For the master drive to recognize the slave drive using the DASP-
 signal, the slave drive must assert the DASP- signal at power up, and
 the master drive must monitor DASP- at power up.


 Alternate capacity jumper
 -------------------------
 Some older computers may "hang" if their BIOS detects a hard drive
 that has more than 4,092 cylinders at startup. To allow these
 computers to recognize the ST38641A, the ST36531A, the ST34321 or the
 ST33221A, these drives include a capacity-limiting jumper, which sets
 the drive's default translation geometry to 4,092 cylinders. This
 limits the drive's capacity to 2.1 Gbytes, unless third-party
 software is used.


 Identify Drive command
 ----------------------
 The Identify Drive command (command code ECH) transfers information
 about the drive to the host following power up. The data is organized
 as a single 512-byte block of data. All reserved bits or words should
 be set to zero. Parameters listed with an "x" are drive-specific or
 vary with the state of the drive.

 Note. If the alternate capacity jumper is installed on these drives,
 the drive capacity is reduced in word 1 to 4,092 cylinders.



                         J2  40 pin I/O Cable Connection
                         |   pin-20 removed
                         |
              +--------- |---------+-------1-/---------\    TOP (HDA)
             -+::::::::::*::::::::1| : : : : | 0 0 0 0 |--
              +--------------------+8|-|-|-|-+-5-G-G-12+    BOTTOM
                                     | | | |
              Master ON, Slave OFF --+ | | |
    Slave Present (when Master ON) ----+ | |
     Cable Select (when Slave OFF) ----+ | |
                          Reserved ------+ |
                    Limit capacity --------+

  Limit Capacity jumper sets the default cylinder translation
  to 4092 to solve issues with certain BIOS that only auto-detect.
  Total available sectors are still at full capacity as reported via
  Identify Drive data words 52 - 61.  Third party partitioning
  software may be needed to achieve full capacity if this option
  jumper is used.



**********************************************************************
                      I   N   S   T   A   L   L
**********************************************************************
SEAGATE  ST38641A  MEDALIST  INSTALLATION GUIDE

 Notes on installation
 =====================

 Installation direction
 ----------------------

     horizontally                           vertically
   +-----------------+             +--+                       +--+
   |                 |             |  +-----+           +-----+  |
   |                 |             |  |     |           |     |  |
 +-+-----------------+-+           |  |     |           |     |  |
 +---------------------+           |  |     |           |     |  |
                                   |  |     |           |     |  |
                                   |  |     |           |     |  |
 +---------------------+           |  +-----+           +-----+  |
 +-+-----------------+-+           +--+                       +--+
   |                 |
   |                 |
   +-----------------+

 The drive will operate in all axis (6 directions).


 Drive mounting
 --------------
 You can mount the drive in any orientation using four screws in the
 side-mounting holes or four screws in the bottom-mounting holes.


 Important mounting precautions:
 -------------------------------
 - Allow a minimum clearance of 0.030 inches (0.76 mm) around the
   entire perimeter of the drive for cooling.

 - Use only 6 -32 UNC mounting screws.

 - Do not insert the mounting screws more than 0.25 inches (6.25 mm)
   into the mounting holes.

 - Do not overtighten the mounting screws (maximum torque: 3 inch-lb).

 - Do not use a drive interface cable that is more than 18 inches
   long.


 ATA interface
 -------------
 These drives use the industry-standard ATA task file interface that
 supports 16-bit data transfers. It supports ATA programmed
 input/output (PIO) modes 0, 1, 2, 3 and 4; multiword DMA modes 0, 1
 and 2; and Ultra DMA modes 0, 1 and 2. The drive also supports the
 use of the IORDY signal to provide reliable high-speed data
 transfers.

 You can use a daisy-chain cable to connect two drives to a single AT
 host bus. For detailed information regarding the ATA interface, refer
 to the draft of AT Attachment with Packet Interface Extension (ATA/
 ATAPI-4), NCITS T13 1153D, subsequently referred to as the Draft
 ATA-4 Standard.



**********************************************************************
                      F   E   A   T   U   R   E  S
**********************************************************************
SEAGATE  ST38641A  MEDALIST  INSTALLATION GUIDE


 Introduction
 ------------
 The Medalist 8641 (ST38641A), Medalist 6531 (ST36531A), Medalist
 4321 (ST34321A), Medalist 3221 (ST33221A) and Medalist 2110
 (ST32110A) provide the following key features:

 - Low power consumption

 - Quiet operation

 - Support for S.M.A.R.T. drive monitoring and reporting

 - High instantaneous (burst) data-transfer rates (up to 33.3 Mbytes
   per second) using Ultra DMA mode 2

 - Full-track multiple-sector transfer capability without local
   processor intervention

 - 128-Kbytes cache

 - State-of-the-art caching and on-the-fly error-correction algorithms

 - Support for Read Multiple and Write Multiple commands

 - Support for autodetection of master/slave drives that use cable
   select (CSEL)

 - These drives use MR recording heads and PRML technology, which
   provides the drives with increased areal density.


 Drive specifications
 --------------------
 Unless otherwise noted, all specifications are measured under ambient
 conditions, at 25*C, and nominal power. For convenience, the phrases
 the drive and this drive are used throughout this manual to indicate
 the ST38641A, ST36531A, ST34321A, ST33221A and the ST32110A.

 Note. DOS systems cannot access more than 528 Mbytes on a drive
 unless 1) the host system supports and is configured for LBA
 addressing or for extended CHS addressing, 2) the host system
 contains a specialized drive controller, or 3) the host system runs
 BIOS translation software. Contact your Seagate (r) repre-sentative
 for details.


 LBA Mode
 --------
 When addressing either drive in LBA mode, all blocks (sectors) are
 consecutively numbered from 0 to n - 1, where n is the number of
 guaranteed sectors as defined above.


 Supported CHS translation geometries
 ------------------------------------
 These drives support any translation geometry that satisfies all of
 the following conditions:

 - Sectors per track         -   63
 - Heads                     -   16

 The ST38641A logical cylinders are:
    Logical cylinders=16,809,660

 The ST36531A logical cylinders are:
     Logical cylinders=12,706,470

 The ST34321A logical cylinders are:
     Logical cylinders=8,404,830

 The ST33221A logical cylinders are:
     Logical cylinders=6,303,024

 The ST32110A logical cylinders are:
     Logical cylinders= 4,124,736


 Internal data-transfer rate (Mbits per second max) 140

 I/O data-transfer rate (Mbytes per second max) 16.6 (PIO mode 4 with
 IORDY) 16.6 (multiword DMA mode 2)

 33.3 (Ultra DMA mode 2)

 Interleave 1:1

 Cache buffer (Kbytes) 128


 Seek time
 ---------
 All seek times are measured using a 486 AT computer (or faster) with
 a 8.3 MHz I/O bus. The measurements are taken with nominal power at
 25*C ambient temperature. All times are measured using drive
 diagnostics.


 Power Specifications
 --------------------
 The drive receives DC power (+5V or +12V) through a four-pin standard
 drive power connector.


 Power consumption
 -----------------
 Power requirements for the drives are listed in the table on page 9.
 Typical power measurements are based on an average of drives tested
 under nominal conditions, using 5.0V input voltage at 25*C ambient
 temperature.

 Spinup power is measured from the time of power-on to the time that
 the drive spindle reaches operating speed.

 During seek mode, the read/write actuator arm moves toward a specific
 position on the disc surface and does not execute a read or write
 operation. Servo electronics are active. Seek mode power represents
 the worst case power consumption, using only random seeks with read
 or write latency time. This mode is not typical and is provided for
 worst-case information.


 Read/Write power and current are measured with the heads on track,
 based on a 16-sector write followed by a 32-msec delay, then a
 16-sector read followed by a 32-msec delay.

 Operating power and current are measured using 40 percent random
 seeks, 40 percent read/write mode (1 write for each 10 reads), and 20
 percent drive inactive.

 Idle mode power is measured with the drive up to speed, with servo
 electronics active, and with the heads in a random track location.
 During Standby mode, the drive accepts commands, but the drive is not
 spinning, and the servo and read/write electronics are in power-down
 mode.



 Conducted noise
 ---------------
 Input noise ripple is measured at the host system power supply across
 an equivalent 80-ohm resistive load on the +12 volt line or an
 equivalent 15-ohm resistive load on the +5 volt line.

 - Using 12-volt power, the drive is expected to operate with a
   maximum of 120 mV peak-to-peak square-wave injected noise at up to
   10 MHz.

 - Using 5-volt power, the drive is expected to operate with a maximum
   of 100 mV peak-to-peak square-wave injected noise at up to 10 MHz.
   Note. Equivalent resistance is calculated by dividing the nominal
   voltage by the typical RMS read/write current.


 Voltage tolerance
 -----------------
 Voltage tolerance (including noise): 5V  5% and 12V  10%

 Active mode. The drive is in Active mode during the read/write and
 seek operations.

 Idle mode. The buffer remains enabled, and the drive accepts all
 commands and returns to Active mode any time disc access is
 necessary.

 Standby mode. The drive enters Standby mode when the host sends a
 Standby Immediate command. If the host has set the standby timer, the
 drive can also enter Standby mode automatically after the drive has
 been inactive for a specifiable length of time. The standby timer
 delay is established using a Standby or Idle command. In Standby
 mode, the heads are parked and the spindle is at rest. The drive
 accepts all commands and returns to Active mode any time disc access
 is necessary.

 Sleep mode. The drive enters Sleep mode after receiving a Sleep
 command from the host. The heads are parked and the spindle is at
 rest.

 The drive leaves Sleep mode after it receives a Hard Reset or Soft
 Reset from the host. After receiving a reset, the drive exits Sleep
 mode and enters Active mode with all current translation parameters
 intact.

 Standby timers. Each time the drive performs an Active function
 (read, write or seek), the standby timer is reinitialized and begins
 counting down from its specified delay times to zero. If the standby
 timer reaches zero before any drive activity is required, the drive
 makes a transition to Standby mode. In both Idle and Standby mode,
 the drive accepts all commands and returns to Active mode when disc
 access is necessary.


 Shock
 ------
 All shock specifications assume that the drive is mounted securely
 with the input shock applied at the drive mounting screws. Shock may
 be applied in the X, Y or Z axis.


 Operating shock
 ---------------
 These drives comply with the performance levels specified in this
 document when subjected to a maximum operating shock of 10.0 Gs
 (based on half-sine shock pulses of 11 msec, as specified in
 MIL-STD-202F).

 Shocks are not to be repeated more than two times per second.


 Nonoperating shock
 ------------------
 The nonoperating shock level that the drive can experience without
 incurring physical damage or degradation in performance when
 sub-sequently put into operation is 75 Gs (based on nonrepetitive
 halfsine shock pulses of 11 msec duration) or 200 Gs (based on
 nonrepetitive halfsine shock pulses of 2 msec duration). Shock
 pulses are defined by MIL-STD-202F.


 Vibration
 ---------
 All vibration specifications assume that the drive is mounted
 securely with the input vibration applied at the drive mounting
 screws.

 Vibration may be applied in the X, Y or Z axis.


 Operating vibration
 -------------------
 The following table lists the maximum vibration levels that the drive
 may experience while meeting the performance standards specified in
 this document.

          5-22 Hz 0.20-inch displacement (peak to peak)
          22-350 Hz 0.50 Gs acceleration (zero to peak)


 Nonoperating vibration
 ----------------------
 The following table lists the maximum nonoperating vibration that the
 drive may experience without incurring physical damage or degradation
 in performance when put into operation.

          5-22 Hz 0.10-inch displacement (peak to peak)
          22-350 Hz 5.0 Gs acceleration (zero to peak)



 Drive acoustics
 ---------------
 Drive acoustics are measured as overall A-weighted acoustic sound
 power levels (no pure tones). All measurements are generally
 consistent with ISO document 7779. Sound power measurements are taken
 under essentially free-field conditions over a reflecting plane. For
 all tests, the drive is oriented with the cover facing upward.

 For the seeking mode, the drive is placed in seek only. The number of
 seeks per second is defined by the following equation:

 Number of seeks per second=0.4/(average latency+average access time)



 Safety certification
 --------------------
 The drives are recognized in accordance with UL 1950 and CSA C22.2
 (950) and meet all applicable sections of IEC950 and EN 60950 as
 tested by TUV North America.


 Electromagnetic Compatibility
 -----------------------------
 Hard drives that display the CE marking comply with European Union
 requirements specified in Electromagnetic Compatibility Directives.
 Testing is performed to standards EN50082-1 and EN55022-B.

 Seagate uses an independent laboratory to confirm compliance with the
 EC directives specified in the previous paragraph. Drives are tested
 in representative end-user systems. Although CE-marked Seagate drives
 comply with the directives when used in the test systems, we cannot
 guarantee that all systems will comply with the directives. The drive
 is designed for operation inside a properly designed enclosure, with
 properly shielded I/O cable (if necessary) and terminators on all
 unused I/O ports. Computer manufacturers and system integrators
 should confirm EMC compliance and provide CE marking for their
 products.

 Australian C-Tick
 If this model has the C-Tick marking, it complies with the
 Australia/New Zealand Standard AS/NZS3548 1995 and meets the
 Electromagnetic Compatibility (EMC) Framework requirements of
 Australia's Spectrum Management Agency (SMA).



 FCC verification
 ----------------
 These drives are intended to be contained solely within a personal
 computer or similar enclosure (not attached as an external device).
 As such, each drive is considered to be a subassembly even when it is
 individually marketed to the customer. As a subassembly, no Federal
 Communications Commission verification or certification of the device
 is required.

 Seagate Technology, Inc. has tested this device in enclosures as
 described above to ensure that the total assembly (enclosure, disc
 drive, motherboard, power supply, etc.) does comply with the limits
 for a Class B computing device, pursuant to Subpart J, Part 15 of the
 FCC rules.

 Operation with noncertified assemblies is likely to result in
 interference to radio and television reception.

 Radio and Television Interference. This equipment generates and uses
 radio frequency energy and if not installed and used in strict
 accordance with the manufacturer's instructions, may cause
 interference to radio and television reception.

 This equipment is designed to provide reasonable protection against
 such interference in a residential installation. However, there is no
 guarantee that interference will not occur in a particular
 installation. If this equipment does cause interference to radio or
 television, which can be determined by turning the equipment on and
 off, you are encouraged to try one or more of the following
 corrective measures:

 - Reorient the receiving antenna.

 - Move the device to one side or the other of the radio or TV.

 - Move the device farther away from the radio or TV.

 - Plug the computer into a different outlet so that the receiver and
   computer are on different branch outlets.

 If necessary, you should consult your dealer or an experienced
 radio/television technician for additional suggestions. You may find
 helpful the following booklet prepared by the Federal Communications
 Commission:

 How to Identify and Resolve Radio-Television Interference Problems.
 This booklet is available from the Superintendent of Documents,
 U.S. Government Printing Office, Washington, DC 20402. Refer to
 publication number 004-000-00345-4.



 Handling and static-discharge precautions
 -----------------------------------------
 After unpacking, and before installation, the drive may be exposed to
 potential handling and electrostatic discharge (ESD) hazards. Observe
 standard static-discharge precautions. A grounded wrist-strap is
 preferred.

 Handle the drive only by the sides of the head/disc assembly. Avoid
 contact with the printed circuit board, all electronic components and
 the interface connector. Do not apply pressure to the top cover of
 the drive.

 Always rest the drive on a padded antistatic surface until you mount
 it in the host system.



 S.M.A.R.T.
 ----------
 S.M.A.R.T. provides nearterm failure prediction for disc drives.
 When S.M.A.R.T. is enabled, the drive monitors predetermined drive
 attributes that are susceptible to degradation over time. If
 selfmonitoring determines that a failure is likely, S.M.A.R.T. makes
 a status report available to the host. Not all failures are
 predictable. S.M.A.R.T. predictability is limited to the attributes
 the drive can monitor. For more information on S.M.A.R.T. commands
 and implementation, see the Draft ATA-4 Standard. These drives are
 shipped with S.M.A.R.T. features disabled. You must have a recent
 BIOS or software package that supports S.M.A.R.T. to enable the
 feature. The table below shows the S.M.A.R.T. command codes that
 these drives use.



**********************************************************************
                      G   E   N   E   R   A   L
**********************************************************************
SEAGATE   ATA-INTERFACE

 ATA Interface Reference Manual 36111-001, Rev. C 21 May 1993
 1993 Seagate Technology, Inc. All rights reserved
 Publication Number: 36111-001, Rev. C

 Introduction
 ------------
 This manual describes Seagate Technology s implementation of the AT
 Attachment (ATA) interface, an intelligent hard disc drive interface
 for use in personal computer systems. This manual includes supported
 ATA interface commands, command execution, translation methodology,
 caching, power management, signal conventions, line specifications,
 and interpretations of error conditions. These interface descriptions
 are based on the draft proposed American National Standard (dpANS)
 ATA Interface Revision 4.0. For information on a particular Seagate
 ATA interface drive (including any drive-unique features not listed
 in this document), refer to the product manual for the specific
 drive.


 Advantages of the ATA interface
 -------------------------------
 The ATA interface is a natural extension of the ISA system bus. Most
 of the signals and circuitry necessary for the interface are already
 present in the host system. The interface is easily implemented into
 the design of an ISA or EISA system with little or no extension
 required in the system software. It is for this reason that the ATA
 interface standard has gained such wide acceptance in the personal
 computer industry. The ATA interface is designated as a logic-level
 interface, and responds to high-level commands from the host. The
 drive itself is an intelligent device with an embedded controller
 that interprets and executes the commands sent from the host. After
 command execution, the drive reports information on successful
 command completion, any error conditions and all parameters
 appropriate to drive status queries.


 Origins and implementation history
 ----------------------------------
 The ATA interface has evolved rapidly since its initial design by
 Compaq Corporation. After refining the basic ATA interface concepts
 and circuitry, Compaq Corporation worked with Imprimis (now a part of
 Seagate) to build the first ATA interface drive. At this stage, the
 interface was far from being an accepted standard. However, it was a
 natural extension of the ATA I/O bus, and gained industry-wide
 acceptance because most of the necessary framework needed for the
 implementation was already present in the host machine.

 Initially, there were no industry-wide standards for implementing the
 ATA interface, leaving manufacturers free to extend and improve upon
 it. In the latter part of 1988, a Common Access Method (CAM)
 committee was established to develop such standards. Their results
 were adopted by the American National Standards Institute (ANSI) with
 the intent of creating a common ATA command specification.
 The ANSI standard for the ATA interface now provides specifications
 for mandatory commands, signal conventions, register descriptions and
 other information necessary for basic compatibility across
 manufacturers and platforms. The current ANSI specification includes
 provisions for extended features such as caching and power
 management, while also providing options for vendor-specific
 enhancements.


 Nomenclature and conventions
 ----------------------------
 Throughout this manual, the term master refers to Drive 0 in a
 two-drive system; the term slave refers to Drive 1, if present.

 Signals may be asserted or negated. A signal that is asserted as a
 higher positive voltage is referred to as active high. A signal that
 is asserted as a lower (positive) voltage is referred to as active
 low, and is indicated by a minus sign (-) following the signal name.


 ATA cables and connectors
 -------------------------
 The standard ATA interface cable is a 40-conductor nonshielded cable.
 The cable should be no more than 18 inches (457 mm) long, with
 connectors that provide strain relief and are keyed at pin 20. Two
 types of connectors are used on Seagate s ATA-capable drives: a
 40-pin connector for 5.25-and 3.5-inch drives, and a 50-pin connector
 for 2.5- and 1.8-inch drives.


 Connector used on 5.25- and 3.5-inch drives
 -------------------------------------------
 The standard connector used on 5.25- and 3.5-inch drives has 40 pin
 positions in 2 rows of 20 pins each, on 100 mil (0.1 inch) centers.
 Pin 20 is removed for keying. The mating cable connector is a keyed,
 40-pin-position nonshielded female connector with 2 rows of 20
 contacts on 100 mil centers. For 5.25- and 3.5-inch drives,
 power is supplied to the drive through a separate 4-conductor cable.

 Seagate recommends using 40-pin connectors such as AMP part number
 1-499496-0, Du Pont part number 66900-040, or equivalent.


 Connector used on 2.5-inch drives
 ---------------------------------
 The ATA connector on 2.5-inch drives has 50 pin positions. In
 addition to the key pin, one pair of pins is removed, and the four
 end pins are used as jumpers for master/slave configurations.
 This leaves 44 pins to supply power and conduct signals to and from
 the drive.

 The signal pins (1 through 40) are assigned the same signals as in
 the 40-pin connector used for 5.25- and 3.5-inch drives. Power is
 supplied through pins 41, 42 and 43. The mating cable connector is a
 44-conductor nonshielded connector with 2 rows of 22 female contacts
 on 0.079-inch (2 mm) centers.

 We recommend using a connector such as Molex part number 87259-
 4413 or equivalent for 2.5-inch drives attached to flexible cables or
 printed circuit cables. Some Seagate 2.5-inch drives are designed to
 support the industry-standard MCC direct-mounting specifications (see
 drive product manual for details). MCC-compatible connectors (such as
 Molex part number 87368-442 x or equivalent) and mounting hardware
 must be used with these drives in fixed-mounting applications.


 System configurations
 ---------------------
 Seagate recommends using the ATA interface in one of the following
 configurations:

 - If the system motherboard has its own ATA connector, then you can
   connect the drive interface cable directly to the system
   motherboard.

 - If the system does not have a built-in ATA connector, then attach
   the interface cable to a Seagate ST07A or ST08A host adapter
   installed in a system expansion slot.


 Signal / Pin descriptions
 -------------------------
 Note. Not all Seagate drives support the full complement of ATA
 signals listed below. To determine the complete set of signals that
 are supported by a particular Seagate drive, see the product manual
 for that drive.

 Data lines to and from host. These comprise the 16-bit tristate,
 bidirectional data bus between host and drive. The lower 8-bits of
 host data (0 7) are used for register and ECC access. All 16 bits are
 used for data transfers.

 19 Ground Grounding pin
 20 Key An unused pin, which is clipped off at the drive to allow
    keyed cable attachment.
 21 DMARQ DMA Request (optional)
 22 Ground Grounding pin
 23 DIOW Drive I/O write strobe. Rising edge clocks data from the host
    data bus to a drive register or data port.
 24 Ground Grounding pin
 25 DIOR Drive I/O read strobe. Falling edge enables data from a drive
    register or data port to host data bus.
 26 Ground Grounding pin
 27 IORDY I/O Channel Ready (optional) - a tristate signal.
 28 SPSYNC or CSEL (optional) SPSYNC is an interdrive clock
    signal sent from the master drive to the slave drive to allow the
    slave to synchronize its spindle motor to the master drive's
    spindle motor. CSEL is used to differentiate master from slave in
    a two-drive system.
 29 DMACK DMA Acknowledge (optional)
 30 Ground Grounding pin
 31 INTRQ A tristate signal used to interrupt the host system.
    Asserted only when the drive has a pending interrupt, the drive is
    selected, and the host has cleared nIEN in the Device Control
    register.
 32 IOCS16 A tristate signal that, when active, indicates to the host
    system that the 16-bit data port has been addressed and that the
    drive is prepared to send or receive a 16-bit data word.
 33 DA1 Drive I/O address line 1: a 3-bit binary coded address
    asserted by the host to access a register or data port in the
    drive.
 34 PDIAG Passed diagnostics. Used by slave to signal to master drive
    that slave has passed its internal diagnostics.
 35 DA0 Drive I/O address line 0 (see DA1 above).
 36 DA2 Drive I/O address line 2 (see DA1 above).
 37 CS1FX Drive I/O chip select decoded from host address lines. When
    active, one of the registers in the Command Block is selected.
 38 CS3FX Drive I/O chip select decoded from host address lines. When
    active, one of the registers in the Control Block is selected.
 39 DASP Dual purpose pin:
    1) When drive is slave (SLV), this pin is used during power up to
       signal to the master that a slave is present.
    2) At all other times, the signal is active when the drive is
       executing a command, and can be used by the host I/O adapter to
       send an activity signal to an LED.
 40 Ground Grounding pin


 Interface handshaking
 ---------------------
 The main handshaking signals between the drive and the host are the
 busy bit (BSY) and the data request bit (DRQ) (in the status
 register) and the interrupt (INTRQ) signal. They can be set in one of
 the following ways:

 - Any reset will cause BSY to be set.
 - Writing a command to the command register will also set BSY.

 The BSY bit is used to indicate that the controller is busy and
 should not be accessed.

 The DRQ bit is used to control the data transfer to and from the
 controller.

 The host can read/write the data register only when the DRQ bit is
 set to 1. The INTRQ signal is generated by the drive to interrupt the
 host. For example, during a Read Sector command, the drive generates
 an INTRQ to the host whenever a sector is ready for the host to read.
 No INTRQ is generated immediately after completion of a Read command.
 The number of interrupts equals the number of sectors read.

 During a Write Sector command, the drive generates an INTRQ whenever
 the drive requests data from the host (except for the first sector).
 The drive also generates an interrupt immediately after completion of
 a Write command. The number of interrupts equals the number of
 sectors written.


 ATA interface I/O registers
 ---------------------------
 The drive communicates with the host system through an I/O register
 that routes the input and output data between registers. These
 registers are selected by codes on the CS1FX, CS3FX, DA2, DA1, DA0,
 DIOR (read) and DIOW (write) lines from the host.

 The I/O register routes data between 14 registers. Ten registers are
 used for commands to the drive or status reports from the drive, one
 register is used for data, and three registers are used for control
 and alternate status.

 These registers can be divided into two groups: Command Block
 registers and Control Block registers.

 PC-AT I/O port address: 3F6H
 This register contains the same information as the Status register in
 the command block. The only difference is that reading this register
 does not imply interrupt acknowledge or reset a pending interrupt.
 This register can be read at any time.

 PC-AT I/O port address: 1F7H
 This eight-bit register contains the host command. When this register
 is written, the drive immediately begins executing the command. The
 host must ensure that the BSY bit in the Status register is set to 0.

 All other setup registers must be written to (with appropriate
 values) before the command register can be written.

 PC-AT I/O port address: 1F5H
 This register contains the most significant bits of the starting
 cylinder address for any disc access. At the completion of a command,
 this register is updated to reflect the current cylinder address.
 With logical block addressing, this register contains bits 23 through
 16 of the LBA.

 Cylinder Low register
 PC-AT I/O port address: 1F4H
 This register contains the eight least significant bits of the
 starting cylinder address for any disc access. At the completion of a
 command, this register is updated to reflect the current cylinder
 address.

 With logical block addressing, this register contains bits 15 through
 8 of the LBA.


 Data register
 PC-AT I/O port address: 1F0H
 This is the register through which:
 - All data is passed during Read and Write commands.
 - The sector table is transferred during format commands.
 The host can only access this register when the DRQ bit in the status
 register is set to 1. All transfers use 16-bit words, except the ECC
 bytes transferred during Read Long and Write Long commands, which use
 8 bit bytes.


 Drive/Head register
 The host selects between the master and slave drives based on the DRV
 bit in the drive/head register. When the DRV bit is not set, the
 master drive is selected, and when the DRV bit is set to 1, the slave
 drive is selected. Seagate drives are designated as master and slave
 by setting the appropriate jumpers.


 Error register
 PC-AT I/O port address: 1F1H
 This register contains the status from the last command executed by
 the drive, or it may contain a diagnostic code. At the completion of
 any command except Execute Drive Diagnostic, the contents of this
 register are valid when ERR=1 in the Status register. Following a
 power on, reset, or completion of an Execute Drive Diagnostic
 command, this register contains a diagnostic code.


 PC-AT I/O port address: 1F2H
 This register specifies the number of sectors of data to be
 transferred during read/write sector commands. The value contained in
 the register is decremented every time a sector is transferred. A
 value of zero specifies 256 sectors. When executing the Initialize
 Drive Parameters or Format commands, this register defines the number
 of sectors per track.

 This register is used by the power mode commands to set timers.


 Sector Number register
 PC-AT I/O port address: 1F3H
 This register contains the starting sector number for any disc
 access. At the completion of a command, this register is updated to
 reflect the last sector transferred correctly, or the sector on which
 an error occurred. The sectors are numbered sequentially, starting
 with 1. With logical block addressing, this register contains bits 7
 through 0 of the logical block address (LBA).


